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ShawnB Click to EMail ShawnBClick to view user profile - (25 posts) Click to check IP address of the poster Apr-03-01, 03:37 PM (EST)
"student question"
This is a question for my students, to force them to look at this site. No responses are needed from all of you regulars (Terry and others I obviously know the answer.

What is the difference between a counter and a timer, they both count dont they?

When will a counters overflow or underflow bit bet set?

Will a TON or TOF keep timing after it has reached its preset?

What will be the state of the enable, timing, and done bits after a timer reaches its preset with the preceding rung logic still true?

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 Table of contents

RE: student question, Terry Woods, Apr-03-01, (1)
RE: student question, ShawnB, Apr-03-01, (4)
RE: student question, Steve Bailey, Apr-03-01, (2)
RE: student question, wally, Apr-03-01, (3)
RE: student question, ShawnB, Apr-03-01, (5)
RE: student question, TIM A MINGUS, Apr-03-01, (6)
RE: student question, ShawnB, Apr-03-01, (7)
RE: student question, Aurelio Torres, Apr-03-01, (8)
RE: student question, ShawnB, Apr-03-01, (9)
RE: student question, t kadlec, Apr-03-01, (10)
RE: student question, Brian Buchberger, Apr-03-01, (11)
RE: student question, ShawnB, Apr-03-01, (14)
student question, gerardo barajas, Apr-03-01, (12)
RE: student question, ShawnB, Apr-03-01, (15)
RE: student question, John Teasley, Apr-03-01, (13)
student question, t kadlec, Apr-03-01, (16)
RE: student question, Jesus Alaniz, Apr-03-01, (17)
RE: student question, Benjamin Galan, Apr-03-01, (18)
RE: student question, Brian Tope, Apr-03-01, (19)

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Messages in this topic

Terry Woods Click to EMail Terry Woods - (708 posts) Click to check IP address of the poster Apr-03-01, 03:50 PM (EST)
1. "RE: student question"

OOH, OOH, MISTA COTTA!

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ShawnB Click to EMail ShawnBClick to view user profile - (25 posts) Click to check IP address of the poster Apr-03-01, 05:48 PM (EST)
4. "RE: student question"
thanks for your responses, but I would like my students to answer, not WALLY (at least you were not my student the last time I looked).

My guys only learn SLC500 AB, easier to learn one well, then go on to others. But they all want to learn. Look back at this in a few days and you should see some answers (besides wally's) from my students.


Terry you crack me up.

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Steve Bailey Click to EMail Steve Bailey - (749 posts) Click to check IP address of the poster Apr-03-01, 04:00 PM (EST)
2. "RE: student question"
Shawn, just make sure that your students realize that the answers to some of the questions will vary depending on brand and model of PLC.
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wally Click to EMail wally - (3 posts) Click to check IP address of the poster Apr-03-01, 04:53 PM (EST)
3. "RE: student question"
Istructions for Allen Bradley PLC SLC500

TON

Use the TON instruction to turn an output on or off after the timer has been on for a preset time interval. This output instruction begins timing (at either one second or one hundredth of a second intervals) when its rung goes "true." It waits the specified amount of time (as set in the PRESET), keeps track of the accumulated intervals which have occurred (ACCUM), and sets the DN (done) bit when the ACCUM (accumulated) time equals the PRESET time.

As long as rung conditions remain true, the timer adjusts its accumulated value (ACC) each evaluation until it reaches the preset value (PRE). The accumulated value is reset when rung conditions go false, regardless of whether the timer has timed out.

Instruction bits: 13 = DN (done)
14 = TT (timer timing bit)
15 = EN (enable bit)

If power is lost while a TON is timing but has not reached its preset value, the EN, and TT bits remain set , and the accumulated value (ACCUM) remains the same. This is also true if the processor changes from the REM Run or REM Test mode to the REM Program mode.

----------------------
TOF

Use the TOF instruction to turn an output on or off after its rung has been off for a preset time interval. The TOF instruction begins to count timebase intervals when the rung makes a true-to-false transition. As long as rung conditions remain false, the timer increments its accumulated value (ACC) each scan until it reaches the preset value (PRE).

The Accumulated value is reset when rung conditions go true regardless of whether the timer has timed out.


Status bits:

13 = DN
(done bit) Set when rung conditions are true; remain so until rung conditions go false and the accumulated value is greater than or equal to the preset value.
14 = TT
(timer timing bit) Set when rung conditions are false and the accumulated value is less than the preset value; remain so until rung conditions go true or when the done bit is reset.
15 = EN
(enable bit) Set when rung conditions are true; remain so until rung conditions go false.
Program Mode
When processor operation changes from REM Run or REM Test mode to REM Program mode or if power is lost while a TOF is timing but has not reached its preset value, the EN, TT, and DN bits remain set, and the accumulated value (ACCUM) remains the same.
Run or Test Mode
When the rung is true the DN and EN bits are set (1) and the ACC value and TT bit are reset (0).
When the rung is false the DN, EN and TT bits are reset (0) and the ACC value is set equal to the preset value.

Rockwell Software 2000


Ciao

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ShawnB Click to EMail ShawnBClick to view user profile - (25 posts) Click to check IP address of the poster Apr-03-01, 05:50 PM (EST)
5. "RE: student question"
Wally, your look up is to find out what the difference between a counter and timer is, since you did not say what the difference is I must assume you either dont know, or can not follow directions. Your grade 75%. looks good. you took some time to type in your answer.
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TIM A MINGUS Click to EMail TIM A MINGUS - (2 posts) Click to check IP address of the poster Apr-03-01, 08:36 PM (EST)
6. "RE: student question"
A TIMER RUNS FROM THE PLC CLOCK AND IT TIMES WHATEVER YOU TELL IT TO. EX. HOW LONG AN INPUT OR OUTPUT IS ON OR OFF AND A COUNTER COUNTS WHATEVER IT IS TOLD TO COUNT WHETHER IT BE THE NUMBER OF TIMES AN INPUT IS ACTIVATED OR THE NUMBER OF TIMES AN OUTPUT IS ACTIVATED AND SO ON.

A COUNTERS OVERFLOW AND UNDERFLOW BIT WILL BE ACTIVATED WHEN IT REACHES A COUNT OF 32,768+ FOR OVERFLOW AND 32,768- FOR UNDERFLOW

NEITHER A TIMER IS ONLY TIMING UP TO IT'S PRESET BE IT TON OR TOF

WITH A TON THE STATUS WILL BE:

EN. ON
TT. OFF
DN. ON

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ShawnB Click to EMail ShawnBClick to view user profile - (25 posts) Click to check IP address of the poster Apr-03-01, 08:52 PM (EST)
7. "RE: student question"
Good, now go study some more.
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Aurelio Torres Click to EMail Aurelio Torres - (2 posts) Click to check IP address of the poster Apr-03-01, 08:57 PM (EST)
8. "RE: student question"
1) DIFFRENCE BETWEEN A COUNTER AND A TIMER IS THAT A "COUNTER" COUNTS THE # OF TIMESLOGICAL STATEMENTS GO FROM FALSE TO TRUE. FOR EXAMPLE, AN OBJECT PASSING ON A CONVEYOR TO BE COUNTED. "TIMERS" COUNT TIME UNITS OR FOR HOW LONG SOMETHING IS ON. 2) A COUNTER WILL OVERFLOW TO -32,768 IF IT COUNTS UP PAST +32,767. IT WILL UNDERFLOW TO +32,767 IF IT COUNTS DOWN PAST -32,768


3) NO.


4) A TIMER ON DELAY FOR EXAMPLE: WILL HAVE IT'S -DN BIT ON
-EN BIT ON
-TT BIT OFF.

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ShawnB Click to EMail ShawnBClick to view user profile - (25 posts) Click to check IP address of the poster Apr-03-01, 09:02 PM (EST)
9. "RE: student question"
Wow, you guys sound like you know something.
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t kadlec Click to EMail t kadlec - (3 posts) Click to check IP address of the poster Apr-03-01, 09:03 PM (EST)
10. "RE: student question"
1)timers count time and counters count any act that is countable.
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Brian Buchberger Click to EMail Brian Buchberger - (2 posts) Click to check IP address of the poster Apr-03-01, 09:09 PM (EST)
11. "RE: student question"
difference between a counter and a timer is that a counter will count individual counts or impulses from a limit switch or photoelectric counter and will only count when this device is tripped by a part or something else. A timer will count up to a value set by a preset in the timer. This timer will start counting when it is activated by either and input or an output. It will keep counting until it is reset either by a done but , input or an output.

A counter will overflow a bit set or otherwise the counter will count up above a preset value.
It will not quit until it is reset.

A TON will keep counting after it has reached its preset. The TON will keep timing and having its DN bits go true after each interval of timing. It will keep timing as long as eveything in front of the timer stays true. If not it will stop timing. The timer will not be reset until it has been told to do so either by a DN or other command. When it is rest it will start timing again unless there is something false in front of the timer.

The state of the enable, timing and done bits will be True when the timer reaches its preset they will stay true until the timer is reset.


brian buchberger

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ShawnB Click to EMail ShawnBClick to view user profile - (25 posts) Click to check IP address of the poster Apr-03-01, 09:12 PM (EST)
14. "RE: student question"
Obviously one of my more lazy students. Perhaps has trouble typing.
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gerardo barajas Click to EMail gerardo barajas - (2 posts) Click to check IP address of the poster Apr-03-01, 09:09 PM (EST)
12. "student question"
the diffrence between counters and timers is the counters count individual counts every time it trigers it will count.a timer wiil time a timing value when its triger from a input or a bit to start timing.

counters will flow when it a bit set otherwise wil keep countigup.
The difference between a counter and a timer is that a counter will count individual counts or impulses from a limit switch or photoelectric counter and will only count when this device is tripped by a part or something else. A timer will count up to a value set by a preset in the timer. This timer will start counting when it is activated by either and input or an output. It will keep counting until it is reset either by a done but , input or an output.

A counter will overflow a bit set or otherwise the counter will count up above a preset value.
It will not quit until it is reset.

A TON will keep counting after it has reached its preset. The TON will keep timing and having its DN bits go true after each interval of timing. It will keep timing as long as eveything in front of the timer stays true. If not it will stop timing. The timer will not be reset until it has been told to do so either by a DN or other command. When it is rest it will start timing again unless there is something false in front of the timer.

The state of the enable, timing and done bits will be True when the timer reaches its preset they will stay true until the timer is reset.

gerardo

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ShawnB Click to EMail ShawnBClick to view user profile - (25 posts) Click to check IP address of the poster Apr-03-01, 09:15 PM (EST)
15. "RE: student question"
You have some things to look up. Your timer bits are incorrect, so are your thoughts about how a timer times. Look this up before the next class.
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John Teasley Click to EMail John Teasley - (4 posts) Click to check IP address of the poster Apr-03-01, 09:11 PM (EST)
13. "RE: student question"
Yes a counter and timer both count,
but a counter and timers address are different,
C5:0 for counters and T4:0 for timers.

A counter will overflow when its counts up past +32,767
and will underflow if it counts down past -32,768.

NO.

With the input on the timer done bit will stay on
until the power is shut down,or,Reset.

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t kadlec Click to EMail t kadlec - (3 posts) Click to check IP address of the poster Apr-03-01, 09:23 PM (EST)
16. "student question"
1) timers are counters that count time units and counters count logic changes. 2) counters overflow if it counts past 32767 to -32767 and underflows if it goes down past -32767 to 323767. 3)no 4)en and dn are 1 and tt is 0.
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Jesus Alaniz Click to EMail Jesus Alaniz - (4 posts) Click to check IP address of the poster Apr-03-01, 09:30 PM (EST)
17. "RE: student question"
1)"COUNTER: A device that can count up or down in response to transitions(Off or On) of an input signal and opens or closes contacts when a predetermined count is reached. Counters are internal to the processor and are not real world devices"
2)"TIMER:In a PLC, a timer is internal to the PROCESSOR, meaning that it does not exist in the real world, but can be controlled by a user-programed instruction. A timer has greater accuracy and timing range then a hardware timer."
3)When it exceeds the manufactures programmed preset limits.
4)In my factory anything is possible.
5)They will be stopped in their "accumulated" position.

When I first started taking college courses I decided to pick a role model of high intellect, Albert Einstein. One day I read one of his quotes "I never memorize anything that I can look up". Taking this into practice is how I failed my first closed book mid-term exam!

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Benjamin Galan Click to EMail Benjamin Galan - (2 posts) Click to check IP address of the poster Apr-03-01, 09:51 PM (EST)
18. "RE: student question"
1)Counter count the number of times logicals statements go from false to true. Timers count time units

2)If a counter counts up past plus 32,767, it will overflow to - 32, 768. If it counts down past -32768 it will underflow to plus 32,767.

3) no

4)DB are true until reset

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Brian Tope Click to EMail Brian Tope - (2 posts) Click to check IP address of the poster Apr-03-01, 10:49 PM (EST)
19. "RE: student question"
1.) A timer counts time units internal to the plc, where a counter counts logic transitions of the input.

2.) A counter over/underflows when it counts beyond it's range of -32,767through 32,767.

3.) TOF

EN TT DN
4.) TON 1 0 1

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